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A new method for design of robust digital circuits
Logic process optimizing circuit digital circuit parameters function monte carlo
2015/8/11
As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional circuit optimization me...
An efficient method for large-scale gate sizing
Combinational logic circuits geometric process circuit
2015/8/10
We consider the problem of choosing the gate sizes or scale factors in a combinational logic circuit in order to minimize the total area, subject to simple RC timing constraints, and a minimum allowed...
A New Parameter-Extraction Method for DGS and its Application to the Low-Pass Filter
Parameter-Extraction Method DGS the Low-Pass Filter
2010/12/7
A new and simple parameter-extraction method for the equivalent circuit of defected ground structure (DGS) is presented. Using this method, circuit simulation, based on the DGS equivalent-circuit mode...
Organization of a Circuit Simulator Based on Waveform-Relaxation Method
Circuit simulator WR method Circuit design CAD
2010/12/7
The design of a circuit simulator based on the WR procedure is described. The relevant algorithms are presented.
A New Statistical Method for Maximum Power Estimation in CMOS VLSI Circuits
Maximum power reliability CMOS VLSI circuits statistics extremes
2010/12/8
A method for maximum power estimation in CMOS VLSI circuits is proposed. The method is based on extreme value theory and allows for the calculation of the upper end point of the probability distributi...