搜索结果: 1-2 共查到“电子科学与技术 USB”相关记录2条 . 查询时间(0.046 秒)
Design synthesizable USB 3.0 using Verilog HDL and simulate design using Cadence
Simulation design the physical layer link layer transmitter to transmit data
2014/12/31
In this project I design USB 3.0 using Verilog HDL and simulate the design in Cadence. My design mainly includes two layers of USB 3.0, Physical Layer and Link Layer. Along with USB 2.0 functionality ...