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SIKE'd Up: Fast and Secure Hardware Architectures for Supersingular Isogeny Key Encapsulation
SIKE post-quantum cryptography isogeny-based cryptography FPGA
2019/6/19
In this work, we present a fast parallel architecture to perform supersingular isogeny key encapsulation (SIKE). We propose and implement a fast isogeny accelerator architecture that uses fast and par...
SecChisel: Language and Tool for Practical and Scalable Security Verification of Security-Aware Hardware Architectures
implementation hardware security verification
2017/3/6
Due to lack of practical and scalable security verification tools and methodologies, very few of the existing hardware-software security architectures have been thoroughly checked at the design time. ...
Fast Hardware Architectures for Supersingular Isogeny Diffie-Hellman Key Exchange on FPGA
Post-quantum cryptography elliptic curve cryptography isogeny-based cryptography
2016/12/7
In this paper, we present a constant-time hardware implementation that achieves new speed records for the supersingular isogeny Diffie-Hellman (SIDH), even when compared to highly optimized Haswell co...
A Systolic Hardware Architectures of Montgomery Modular Multiplication for Public Key Cryptosystems
Hardware Implementation Modular Multiplication Montgomery Algorithm
2016/5/23
The arithmetic in a finite field constitutes the core of Public Key Cryptography like RSA, ECC or pairing-based cryptography. This paper discusses an efficient hardware implementation of the Coarsely ...
Novel algorithms and hardware architectures for Montgomery Multiplication over GF(p)
Montgomery algorithm Digit-based Multiplier FPGA
2015/12/25
This report describes the design and implementation results in FPGAs of a scalable hardware architecture for computing modular multiplication in prime fields GF(p), based on the Montgomery multiplicat...